general description the maxim icl7116 and icl7117 are 3? digit monolithic analog-to-digital converters. they differ from the maxim icl7106 and icl7107 in that the icl7116 and icl7117 have a hold pin, which makes it possible to hold or freeze a reading. these integrating adcs have very high input impedances and directly drive lcd (icl7116) and led (icl7117) displays. versatility and accuracy are inherent features of these converters. the dual-slope conversion technique auto- matically rejects interference signals common in industrial environments. the true differential input is particularly useful when making ratiometric measurements (ohms or bridge transducers). maxim has added a zero-integrator phase to the icl7116 and icl7117, eliminating overrange hangover and hysteresis effects. finally, these devices offer high accuracy by lowering rollover error to less than one count and zero reading drift to less than 1v/oc. applications t hese devices can be used in a wide range of digital panel meter applications. most applications, however, involve the measurement and display of analog data: features improved 2nd source! hold pin allows indefinite display hold guaranteed first reading recovery from overrange on-board display drive capabilityno external circuitry required: lcd (icl7116), led (icl7117) high-impedance cmos differential inputs low noise (< 15v p-p ) without hysteresis or overrange hangover clock and reference on-chip zero input gives zero reading true polarity indication for precision null applications ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to www.maximintegrated.com/icl7116-icl7117.related . pressure voltage resistance temperature conductance current speed material thickness analog input icl7116 + - lcd display v ref closed = holdopen = run 9v to analogcommon pin [pin 32] top view c1 b1 test 12 4039 hold d1 osc2 osc3 osc1 pdip 34 3837 g1 e1 c-ref 56 3635 a1 f1 v+ c+ref ref hi 78 3433 d2 common 9 32 c2 on hi 10 31 b2 on lo 11 30 a2f2 e2 a/z buff int 12 29 13 28 14 d3 15 b3 16 f3 17 e3ab4 pol v- g2 c3 a3 g3 bp/gnd 18 19 20 2726 25 24 23 22 21 icl7116icl7117 detailed circuit diagram - see figure 1 pin configurations continued at end of data sheet icl7116/icl7117 3? digit adcs with display hold 19-0949; rev 1; 9/13 typical operating circuit pin conigurations evaluation kit available downloaded from: http:///
supply voltage icl7116, v+ to v- .................................................................. 15v icl7117, v+ to gnd ............................................................. +6v icl7117, v- to gnd ............................................................... -9v analog input voltage (either input) (note 1) ................... v+ to v - reference lnput voltage (either input) ............................ v+ to v - clock input icl7116 ................................................................... test to v + icl7117 .................................................................. gnd to v + power dissipation (note 2) ceramic package .......................................................... 1000mw cerdip package ............................................................ 800mw plastic package ............................................................... 800mw operating temperature range ............................... 0oc to +70oc storage temperature range ............................. -65oc to +160oc lead temperature (soldering, 60s) ................................. +300oc parameter conditions min typ max units zero input reading v in = 0v full scale = 200.00mv -000.0 000.0 +000.0 digital reading ratiometric reading v in = v ref = 100mv 999 999/ 1000 1000 digital reading rollover error (difference in reading for equal positive and negative reading near full scale) -v in = +v in = 200mv -1 0.2 +1 counts linearity (max. deviation from best straight line fit) full scale = 200mvor full scale = 2.00mv -1 0.2 +1 counts common-mode rejection ratio (note 4) v cm = 1v, v in = 0v full scale = 200.00mv 50 v/v noise (pk-pk value not exceeded 95% of the time) v in = 0v full scale = 200.00mv 15 v leakage current at input v in = 0v 1 10 pa zero reading drift v in = 0v, 0c < t a < 70c 0.2 1 v/c scale factor temperature coeficient v in = 199.0mv 0c < t a < 70c (ext. ref. 0ppm/c) 1 5 ppm/c v+ supply current (does not include led current for icl7117) v in = 0v 0.8 1.8 ma v- supply current for icl7117 only 0.6 1.8 ma analog common voltage (with respect to positive supply) 25 ? between common and positive supply 2.4 2.8 3.2 v temperature coeficient of analog common (with respect to pos. supply) 25? between common and positive supply 80 ppm/c input resistance, pin 1 (note 6) 30 70 k ? v il , pin 1 (icl7116 only) test C 1.5 v icl7116/icl7117 3? digit adcs with display hold www.maximintegrated.com maxim integrated 2 note 1: input voltage may exceed supply voltages, provided the input current is limited to 100a. note 2: dissipation rating assumes device is mounted with all leads soldered to the pcb. absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics (note 3) downloaded from: http:///
this device conforms to the absolute maximum ratings on adjacent page. guaranteed overload recovery time signiicantly improved esd protection (note 8) low noise key parameters guaranteed over temperature negligible hysteresis maxim quality and reliability increased maximum rating for input current (note 9) note 3: unless otherwise noted, specifications apply to both the icl7116 and icl7117 at t a = +25c, f clock = 48khz. icl7116 is tested in the circuit of figure 1 . icl7117 is tested in the circuit of figure 2 . note 4: refer to differential input discussion (see maxims icl7106/icl7107 data sheet). note 5: backplane drive is in phase with segment drive for off segment, 180o out of phase for on segment. frequency is 20 times the conversion rate. average dc component is less than 50mv. note 6: the icl7116 logic input has an internal pulldown resistor connected from hldr, pin 1, to test, pin 37. the icl7117 logic input has an internal pulldown resistor connected from hldr. pin 1, to ground, pin 21. (specifications below satisfy or exceed all tested parameters on adjacent page v+ = 9v, t a = +25oc, f clock = 48khz; test circuit = figure 1 (icl7116), figure 2 (icl7117), unless otherwise noted.) parameter conditions min typ max units zero input reading v in = 0v full scale = 200.00mvt a = +25c (note 7) -000.0 000.0 +000.0 digital reading 0c t a +70c (note 11) -000.0 000.0 +000.0 ratiometric reading v in = v ref = 100mv t a = +25c (note 7) 999 999/ 1000 1000 digital reading 0c t a +70c (note 11) 999 999/ 1000 1001 rollover error (difference in reading for equal positive and negative reading near full scale) -v in = +v in = 200mv t a = +25c (note 7) -1 0.2 +1 counts 0c t a +70c (note 11) 0.2 linearity (max. deviation from best straight line fit) full scale = 200mvor full scale = 2.00mv -1 0.2 +1 counts parameter conditions min typ max v il , pin 1 (icl7117 only) gnd +1.5 v v ih , pin 1 (both) v+ - 1.5 v icl7116 only (note 5) pk-pk segment drive voltage, pk-pk backplane drive voltage v + to v - = 9v 4 5 6 v 4 5 6 icl7117 only (except pin 19) segment sinking current v+ = 5.0v segment voltage = 3v 5 8.0 ma (pin 19 only) 10 16 icl7116/icl7117 3? digit adcs with display hold www.maximintegrated.com maxim integrated 3 absolute maximum ratings electrical characteristics (continued) (note 3) maxim advantageselectrical characteristics downloaded from: http:///
specifications below satisfy or exceed all tested parameters on adjacent page v + = 9v, t a = +25oc, f clock = 48khz; test circuit = figure 1 (icl7116), figure 2 (icl7117), unless otherwise noted.) note 7: test condition is v in applied between pins in hi and in lo i.e., 1m? resistor in figures 1 and 2 . note 8: all pins are designed to withstand electrostatic discharge (esd) levels in excess of 2000v (test circuit per mil. std. 883c. method 3015 2). note 9: input voltages may exceed the supply voltage provided the input current is limited to 1ma (this revises note 1 on the adjacent page). note 10: number of measurement cycles for display to give accurate reading. note 11: 1m? resistor is removed in figures 1 and 2 . parameter conditions min typ max units common-mode rejection ratio (note 4) v cm = 1v, v in = 0v full scale = 200.00mv 50 v/v noise (pk-pk value not exceeded 95% of the time) v in = 0v full scale = 200.00mv 15 v input leakage current v in = 0v, t a = +25c (note 7) 1 10 pa 0c t a +70c 20 200 zero reading drift v in = 0v, 0c t a +70c 0.2 1 v/c scale factor temperature coeficient v in = 199.0mv 0c t a +70c (ext. ref. 0ppm/c) 1 5 ppm/c v+ supply current (does not include led current for icl7117) v in = 0v, t a = +25c 0.8 1.8 ma 0c t a +70c 2 v- supply current for icl7117 only 0.6 1.8 ma analog common voltage (with respect to positive supply) 25? between common and positive supply 2.4 2.8 3.2 v temperature coeficient of analog common (with respect to pos. supply) 25? between common and positive supply 80 ppm/c input resistance, pin 1 (note 6) 30 70 k? v il , pin 1 (icl7116 only) test + 1.5 v v il , pin 1 (icl7117 only) gnd + 1.5 v v ih , pin 1 (both) v+ - 1.5 v icl7116 only (note 5) pk-pk segment drive voltage, pk-pk backplane drive voltage v+ to v- = 9v 4 5 6 v icl7117 only (except pin 19) segment sinking current v+ = 5.0v segment voltage = 3v 5 8.0 ma (pin 19 only) 10 16 icl7116 only C test pin voltage with respect to v+ 4 5 6 v overload recovery time (note 10) v in changing from 10v to 0v 0 1 measur- ement cycles icl7116/icl7117 3? digit adcs with display hold www.maximintegrated.com maxim integrated 4 electrical characteristics (continued) downloaded from: http:///
detailed description the maxim icl7116 and icl7117 3? digit adcs are similar to the maxim icl7106 and icl7107, except for the addition of a hold pin. for a detailed product description, package dimensions, and applications information (other than the operation of the hold pin described below) refer to maxims icl7106 and icl7107 data sheet hold input the hold input is a digital input with a logic threshold approximately midway between v+ and test (icl7116) or v+ and ground (icl7117). the icl7116/icl7117 con - tinuously performs conversions, independent of the hold input. when the hold input is connected to v+, however, the display latch pulse is inhibited, and the the display latches are not updated. the hold input has a 70k pull - down resistor to test (icl7116) or ground (icl7117) and the hold input will be pulled low if it is left open. when hold is low the icl7116/icl7117 updates the display at the end of each conversion. the hold input is cmos compatible and can also be driven by a switch connected to v + ( figure 1 and figure 2 ) or by a pnp transistor. unlike the icl7106 and the icl7107, the icl7116 and icl7117 do not have a reference low input. apply the reference voltage between reference high (ref hi) and common. figure 1. maxim icl7116 typical operating circuit, 200mv reference analog input icl7116 + - lcd display v ref closed = holdopen = run 9v to analogcommon pin [pin 32] in hi 31 in lo 3032 1 m? 0.01f commonbuff 28 a-z 29 int 29 0.47f 0.22f 47 k? 39 34 33 0.1f c+ref c-ref osc 2 osc 3 osc 1 38 c osc 100pf 100 k? 40 r osc segmentdrive 2C19 22C25 pol bp 20 21 minus sign backplanedrive hold 1 v + v - ref hi 3536 26 24 k? 10 k? figure 1 icl7116/icl7117 3? digit adcs with display hold www.maximintegrated.com maxim integrated 5 downloaded from: http:///
figure 2. maxim icl7117 typical operating circuit, 200mv reference d 3 e 2 f 2 a 2 b 2 c 2 d 2 e 1 g 1 f 1 b 3 f 3 e 3 ab 4 pol 4 bp/gnd [7116/7117] g 3 a 3 c 3 g 2 v - int buff a/z in lo in h1 common c - ref c + ref a 1 b 1 c 1 d 1 hldrosc 1 osc 2 osc 3 testref hi v + 0.168" (4.27mm) 0.130" (3.30mm) chip topography analog input icl7117 + - lcd display v ref closed = holdopen = run to analogcommon pin [pin 32] in hi 31 in lo 3032 1 m? 0.01f commonbuff 28 a-z 29 int 29 0.47f 0.22f 47 k? 39 34 33 0.1f c+ref c-ref osc 2 osc 3 osc 1 38 c osc 100pf 100 k? 40 r osc segmentdrive 2C19 22C25 pol bp 2021 backplanedrive 1 v + v - ref hi 3536 26 24 k? 10 k? +5v+5v figure 2 icl7116/icl7117 3? digit adcs with display hold www.maximintegrated.com maxim integrated 6 downloaded from: http:///
+denotes lead(pb)-free/rohs-compliant package. part temp range pin-package icl7116cpl 0c to +70c 40 pdip icl7116cjl 0c to +70c 40 cerdip icl7116cq 0c to +70c 44 lpcc icl7116c/d 0c to +70c dice icl7117cpl 0c to +70c 40 pdip icl7117cjl 0c to +70c 40 cerdip icl7117cmh+ 0c to +70c 44 mqfp icl7117cq 0c to +70c 44 lpcc icl7117c/d 0c to +70c dice n.c.g2 c3 a3 g3 bp/gnd pol ab4 e3 f3 b3 n.c.n.c. test osc3 n.c. osc2osc1 v+ d1c1 b1 12 3 4 5 6 7 8 9 1011 1213 14 15 16 17 18 19 20 21 22 44 4342 41 40 39 38 37 36 35 34 3332 31 30 29 28 27 26 25 24 23 a1 f1 g1 e1 d2c2 b2a2 f2 e2 d3 ref hiv+ c+ ref c- ref common in hi in lo a-z buff int v- mqfp icl7117 top view + 441234 40 41 42 43 5 21 24 26 25 27 28 22 23 19 20 8 9 1011 12 13 14 15 16 17 29 30 31 32 33 34 35 36 37 38 d3 e3 b1 plcc top view c1d1 hold n.c. osc1 osc2 osc3 test ref hi f3 pol ab4 bp/gnd n.c. a3 g3g2 c3 c+ refc- ref common in hi n.c. in lo a/z buff int v- e2 f2 a2 b2 n.c. c2 d2 e1 g1 7 39 v+ f1 6 18 a1 b3 icl7116icl7117 icl7116/icl7117 3? digit adcs with display hold www.maximintegrated.com maxim integrated 7 chip information process: cmos ordering information pin conigurations (continued) downloaded from: http:///
revision number revision date description pages changed 0 9/85 initial release 1 9/13 added the 44 mqfp package to data sheet 1C8 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. icl7116/icl7117 3? digit adcs with display hold ? 2013 maxim integrated products, inc. 8 revision history for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///
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